Quantum Efficiency Tester
PL/EL Integrated System
PV-Reflectumeter
3D Confocal Microscope
In-Line Four Point Probe Tester
Four Point Probe Tester
In-Line Thin Film Thickness Tester
Raman Spectrometer
FTIR Spectrometer
Spectrophotometer
Automatic Spectroscopic Ellipsometer
Contact Resistance Tester
Ultra depth of field 3D microscope
Auto Visual Tester
VMM PV Vision Measuring Machine
Solar Cell Horizontal Tensile Tester
Steady State Solar Simulator for Solar Cell
Solar Cell UV Aging Test Chamber
Solar Cell Comprehensive Tensile Tester
Visual Inspection Tester
Wet Leakage Current Tester
PV Module EL Tester
PV Module UV Preconditioning Chamber
Steady State Solar Simulator for PV Module
Current Continuous Monitor
Potential Induced Degradation Test
Bypass Diode Tester
LeTID Test System
Reverse Current Overload Tester
Impulse Voltage Tester
Hipot Insulation Tester
Ground Continuity Tester
Hipot Insulation Ground Tester
Damp Heat Test Chamber
Humidity Freeze Test
Thermal Cycle Test Chamber
Dynamic Mechanical Load Tester
Static Mechanical Load Tester
Hail Impact Tester
Robustness of Termination Tester
Module Breakage Tester
Cut Susceptibility Tester
Peel Shear Strength Tester
Universal Testing Machine (Single-arm)
Universal Testing Machine (Double-arm)
Glass Transmittance Tester
Acetic Acid Test Chamber
EVA Degree of Crosslinking Test System
Junction Box Comprehensive Tester
Drop ball tester
Semi-automatic scanning four-probe tester
Stylus Profilometer
Maximum Power Point Tracker
Perovskite Glass Transmittance Tester
Perovskite P1 Laser Scribing Multifunctional Testing Machine
Perovskite Online PL Tester
Perovskite Online Sheet Resistance Tester
Online Perovskite Film Thickness Tester
Perovskite Process Inspection Workstation
Portable IV Curve Tester
Portable EL Tester
Portable Thermal Imaging Tester
Solar Module Multi-Channel Testing System
PV Inverter Power Quality Tester
Drone EL Tester
Cleaning and Texturing
Step 1: Double-sided polishing. Monocrystalline wafers undergo alkaline etching to remove surface damage layers from production that trap charge carriers and reduce efficiency.
Step 2: Removes residual films post-Laser 1 to expose the silicon substrate for N-region formation, while eliminating PN junctions on edges/front to prevent leakage.
Step 3: Clears residual films post-Laser 2 to achieve P/N isolation, removes coating overflows on edges/front to prevent leakage, and textures the front surface to create light-trapping structures.
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Go to Product CenterP/N Back-Side Tunneling & i-poly
A back-side ultra-thin oxide tunneling pair modulates carrier transport via quantum tunneling, passivating the cell to reduce surface recombination losses and boost efficiency. Concurrently, intrinsic amorphous silicon (i-a-Si:H) is deposited for subsequent doping.
The hydrogen in i-a-Si:H passivates dangling bonds on the crystalline silicon (c-Si) back surface, lowering interface defect density and recombination. Additionally, i-a-Si:H serves as an intrinsic buffer layer, preventing direct contact between doped layers and c-Si to avoid defect recombination from heavy doping.
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Go to Product CenterDiffusion
Boron diffusion dopes the pre-deposited amorphous silicon, converting it to polycrystalline silicon to form the P⁺ emitter. This simultaneously enhances passivation and improves ohmic contact at the emitter.
Phosphorus diffusion dopes the amorphous silicon into heavily-doped polycrystalline silicon. The work function difference at the c-Si interface induces band bending, creating an accumulation layer that:
(1)Blocks holes while facilitating electron tunneling,
(2) Forms an n⁺/n high-low junction for field-effect passivation.
This dual mechanism optimizes both passivation and ohmic contact at back electrodes.
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Go to Product CenterLaser Patterning
The first laser patterning step selectively removes portions of the post-initial-doping thin films to define the N and P regions.
The second laser process, performed after depositing the opposing doping layer, ablates the overlapping zones between N and P-doped areas to achieve P/N isolation, thereby establishing independent electron and hole transport channels on the backside of the cell.
The third laser operation removes targeted sections of SiNₓ and Al₂O₃ dielectrics to enable direct metal-to-silicon contact for efficient carrier extraction, while simultaneously creating isolation trenches where required by specific BC cell architectures.
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Go to Product CenterALD and Front/Back Films
Al₂O₃ can form a dense film through Atomic Layer Deposition (ALD). Its rich negative fixed charges effectively neutralize the positive charges on the surface of p-type silicon, suppressing surface recombination of charge carriers, particularly demonstrating significant passivation effects on p-type silicon.
The refractive index of SiNₓ can match that of silicon and air, reducing light reflection (especially in the wavelength range of 300–1100 nm) and enhancing the short-circuit current of the cell.
Additionally, SiNₓ releases hydrogen atoms during deposition or sintering, which diffuse into bulk silicon defects or interface states to neutralize dangling bonds, further reducing recombination.
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Go to Product CenterMetallization
In BC (Back Contact) cells, metallization is a critical process for achieving efficient charge carrier collection and low-resistance connections.
For the N-region, silver paste is typically screen-printed and subjected to high-temperature sintering to form metal electrodes, creating ohmic contact with the silicon wafer to collect current. In some processes, the P-region uses aluminum paste, with laser ablation or photolithography employed to open holes in the passivation layer, exposing the silicon surface for metal contact. Other processes involve depositing a seed layer via Physical Vapor Deposition (PVD) followed by electroplating copper to fabricate metal electrodes.
Since all electrodes in BC cells are located on the backside, metallization design must balance low series resistance, high contact selectivity, minimal recombination loss, and precise pattern alignment.
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Go to Product CenterLaser-Assisted Sintering
By irradiating the cell with high-intensity laser to excite charge carriers while applying a deflection voltage of 10V or higher, local currents in the order of amperes are generated. Sintering occurs at the corresponding locations, triggering interdiffusion between silver paste and silicon. This significantly reduces the contact resistance between metal and semiconductor. The pastes used in this process have reduced glass powder content, minimizing corrosion of the passivation layer while forming better ohmic contacts. Currently, this technology has been adopted by some Back Contact (BC) cell manufacturers.
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Go to Product CenterRelated News
Driven by Both Quantum Efficiency and Spectral Response: Research on the Optical Properties and Powe
Efficiency Increased to 25.2% with Thin Layer Resistance Modulation Based Passivation and Anti-Refle
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