TOPCon cells have become the mainstream process for n-type silicon cells due to the excellent passivation performance of the ultra-thin SiO₂/poly-Si layer on the back side. However, the traditional boron diffusion process is costly. This study proposes an innovative solution: a PECVD single-side deposition + simultaneous annealing integrated process. On the front side, a PECVD-deposited boron-doped silicon oxide (SiO₂:B) layer is formed; on the back side, n-type polycrystalline silicon (poly-Si(n)) is treated with an N₂O plasma. A single-step co-annealing process simultaneously forms the double-sided structure, eliminating the BSG cleaning step. The Millennial PL/EL integrated tester supports verification of passivation layer interface quality and damage location identification.

Experiments confirm that this method achieves a conversion efficiency of 21% while reducing manufacturing costs. Through LECO optimization and deep junction design, the efficiency potential reaches 25%, providing a cost-effective upgrade path.

Experimental Methods

(a) Schematic diagram of the solar cell manufacturing process; (b) Sample structure used in the development of boron emitters; (c) Sample structure used in the development of polycrystalline silicon passivated contacts.

Sample preparation

Substrate: 4-inch n-type Czochralski single crystal silicon (FZ, 〈100〉, 2 Ω·cm)

Key processes:

Boron emitter:

HNO₃ thermal oxidation (80°C, 10 min, 1.2 nm) → PECVD deposition of SiO₂:B (SiH₄/CO₂/TMB/H₂)

Annealing (850–950°C, 30–60 min) → Wet etching of residual SiO₂:B with hydrofluoric acid solution

Back Contact:

N₂O plasma-enhanced chemical vapor deposition (PECVD) of tunnel oxide layer (1.3 nm) → PECVD deposition of phosphorus-doped polycrystalline silicon (poly-Si(n), containing 2–3% C)

Tube furnace annealing (900°C) → PECVD deposition of hydrogenated silicon nitride (SiNₓ:H)

Cell integration:

Synchronous annealing (900°C, 1 h) → Front-side atomic layer deposition of aluminum oxide (AlO₂) → Screen printing of silver-aluminum (Ag/Al) grid lines → Back-side vapor HF etching + ITO/Ag sputtering

Characterization techniques:

Boron emitter formation

ECV measurement: (a) Boron diffusion profiles at different annealing temperatures and dwell times (b) Boron diffusion profiles after annealing at different TMB flow rates

Boron-doped SiO₂ (SiH₄/CO₂/H₂/TMB) was deposited on the front surface of the silicon wafer using PECVD technology as the diffusion source.

By controlling the TMB flow rate and annealing parameters, the peak concentration (3×10¹⁹–1×10²⁰ cm⁻³) and junction depth (100–600 nm) were precisely adjusted.

The optimized emitter (TMB = 50 sccm) combined with an AlO₂/SiN₂ layered passivation achieves ρ_c < 5 mΩ cm² after traditional screen-printed AgAl sintering.

High-temperature stable back passivation contact

Open-circuit voltage variation with heat budget for symmetric SiO₂/polysilicon samples under two oxidation strategies

Photoluminescence (PL) images of symmetric polysilicon (n) samples after N₂O treatment and hydrogenation at 900°C for 1 hour (left) and after metallization of the TLM structure (right)

The passivation performance (iVoc) of the n-poly-Si passivated contact in the traditional UV-O₃ oxidation tunnel layer deteriorates sharply at the high temperature (900°C, >30 min) required to achieve the emitter.

The innovative introduction of N₂O plasma post-treatment significantly enhances interface stability:  

After rigorous annealing at 900°C/60 min, excellent surface passivation is achieved (iVoc ≈ 720 mV);  

Combined with a sputtered ITO/Ag scheme, contact resistivity is as low as 22 mΩ cm²;  

PL analysis shows good uniformity and interface quality.  

Co-annealed prototype cell integration and performance

TOPCon solar cell parameters: Voc, Jsc, FF, and PCE

For the first time, the co-annealing process was integrated into a TOPCon cell prototype, achieving a conversion efficiency (PCE) of 21% without contact optimization (LECO), providing strong proof of concept for a simplified co-annealing process.

Best performance: 20.99% PCE (TMB 50 sccm, peak sintering temperature 840°C), corresponding to Voc=669 mV, Jsc=40.5 mA/cm², FF=78%.

The sources of Voc loss vary with changes in emitter doping (TMB flow) and peak sintering temperature.

Metal-induced recombination (especially in shallow emitters), Auger recombination at high doping concentrations, and bulk lifetime defects are the main causes of Voc loss; emitter thin-film resistance and series resistance lead to FF loss.

Simulation results showing improvements in solar cell efficiency after applying different strategies.

By reducing peak doping concentration, optimizing laser-enhanced contact (LECO), adopting a fine-line metal grid design, and utilizing CZ silicon wafers, simulated efficiency can be improved to 25%.

This study proposes a single-step co-annealing process that simultaneously forms the front-end boron emitter and back-end polycrystalline silicon passivated contact of TOPCon cells via plasma-enhanced chemical vapor deposition (PECVD), replacing the traditional two-step process. A prototype cell with a conversion efficiency of 21% was validated, and optimization pathways were analyzed.

Millennial PL/EL Integrated Testing Instrument

Millennial PL/EL Integrated Testing Instrument simulates sunlight exposure on perovskite solar cells, uniformly illuminating the entire sample, and uses specialized lenses to capture photoluminescence (PL) signals to obtain PL imaging; electroluminescence (EL) signals to obtain EL imaging. Through image algorithms and software, the captured PL/EL images are processed and analyzed to identify PL/EL defects, which are then analyzed, classified, and summarized based on their characteristics.

EL/PL imaging, 5 million pixels, enabling multiple imaging precision switching

Spectral response range: 400 nm to 1200 nm

PL light source: Blue light (customizable light source size, wavelength, etc.)

Multiple defect identification and analysis (pitting, darkening, edge intrusion, etc.) with customizable defect types

The Millennial PL/EL integrated tester performs high-precision analysis of passivation layer uniformity and metal-induced defects—its 5-megapixel dual-mode imaging (PL/EL), 400–1200 nm wide spectral response, and intelligent defect recognition (pitting/edge intrusion, etc.) provide core data support for battery process optimization, accelerating industrialization applications.